/*
*********************************************************************************************************
*                                               uC/OS-II
*                                        The Real-Time Kernel
*
*                          (c) Copyright 1992-2012, Micrium, Inc., Weston, FL
*                                          All Rights Reserved
*
*                                      Renesas RX Specific code
*
* File      : OS_CPU.H
* Version   : V2.92.07
* By        : HMS
*
* LICENSING TERMS:
* ---------------
*             uC/OS-II is provided in source form to registered licensees ONLY.  It is 
*             illegal to distribute this source code to any third party unless you receive 
*             written permission by an authorized Micrium representative.  Knowledge of 
*             the source code may NOT be used to develop a similar product.
*
*             Please help us continue to provide the Embedded community with the finest
*             software available.  Your honesty is greatly appreciated.
*
*             You can contact us at www.micrium.com.
*
* Compiler  : Renesas HEW IDE with the RX compiler
*********************************************************************************************************
*/

#ifndef _OS_CPU_H
#define _OS_CPU_H

#ifdef   OS_CPU_GLOBALS
#define  OS_CPU_EXT
#else
#define  OS_CPU_EXT  extern
#endif

#include  <machine.h>


/*
*********************************************************************************************************
*                                              DATA TYPES
*                                         (Compiler Specific)
*********************************************************************************************************
*/

typedef unsigned char  BOOLEAN;
typedef unsigned char  INT8U;                                   /* Unsigned  8 bit quantity                             */
typedef signed   char  INT8S;                                   /* Signed    8 bit quantity                             */
typedef unsigned short INT16U;                                  /* Unsigned 16 bit quantity                             */
typedef signed   short INT16S;                                  /* Signed   16 bit quantity                             */
typedef unsigned int   INT32U;                                  /* Unsigned 32 bit quantity                             */
typedef signed   int   INT32S;                                  /* Signed   32 bit quantity                             */
typedef float          FP32;                                    /* Single precision floating point                      */
typedef double         FP64;                                    /* Double precision floating point                      */

typedef unsigned int   OS_STK;                                  /* Each stack entry is 32-bit wide                      */
typedef unsigned int   OS_CPU_SR;                               /* Define size of CPU status register (PSR = 32 bits)   */


/*
*********************************************************************************************************
*                                               MACROS
*********************************************************************************************************
*/

#define  OS_STK_GROWTH             1u
#define  OS_TASK_SW()              int_exception(1)

/*
*********************************************************************************************************
*                                              Cortex-M0
*                                      Critical Section Management
*
* Method #1:  Disable/Enable interrupts using simple instructions.  After critical section, interrupts
*             will be enabled even if they were disabled before entering the critical section.
*             NOT IMPLEMENTED
*
* Method #2:  Disable/Enable interrupts by preserving the state of interrupts.  In other words, if
*             interrupts were disabled before entering the critical section, they will be disabled when
*             leaving the critical section.
*             NOT IMPLEMENTED
*
* Method #3:  Disable/Enable interrupts by preserving the state of interrupts.  Generally speaking you
*             would store the state of the interrupt disable flag in the local variable 'cpu_sr' and then
*             disable interrupts.  'cpu_sr' is allocated in all of uC/OS-II's functions that need to
*             disable interrupts.  You would restore the interrupt disable state by copying back 'cpu_sr'
*             into the CPU's status register.
*********************************************************************************************************
*/

#define  OS_CRITICAL_METHOD   3u

#if OS_CRITICAL_METHOD == 3u
#define  OS_ENTER_CRITICAL()  {cpu_sr = get_ipl(); \
                                    set_ipl(12);}
#define  OS_EXIT_CRITICAL()   {set_ipl(cpu_sr);}
#endif


/*
*********************************************************************************************************
*                                         FUNCTION PROTOTYPES
*********************************************************************************************************
*/

void  OSCtxSw        (void);
void  OSIntCtxSw     (void);
void  OSStartHighRdy (void);

void  OS_CPU_TickInit(void);

#endif
